Digitalisation is leading to a worldwide increase in demand for microchips. In addition, the shortening of the product life cycles of many electronic products and the high diversity of customised components are driving a growing demand for high-mix low- volume semiconductor (HMLV) production. Moreover, microchips fulfil increasingly critical functions and their quality is of particular importance, with competition intensifying cost pressure at the same time.

Goals and approach

The Autonomous Integrated Scheduling for Semiconductor Industry (AISSI) project aims to develop, integrate and apply new AI-based approaches in semiconductor manufacturing that build on European quality thinking from the automotive sector. By applying reinforcement learning (RL) in the context of autonomous and continuous improvement of integrated production and maintenance scheduling, European semiconductor manufacturers will gain a competitive advantage in terms of cost-efficiency, output quantities and production quality. The core innovation of the project is a fundamentally new system for production and maintenance planning in semiconductor manufacturing. The concept relies on a new level of interaction between expertise (human expert knowledge) and AI methods (which identify individual advantages based on human expert judgement) and as such enables a new, flexible level of integration, autonomy, quality and efficiency in the production system. This new level of interaction is realised as a semantically and physically inspired system of holistic information that supports a new level of real-time capability and information consistency and enables a highly efficient "plug-in capability" for new innovative AI methods.

The goal is to develop models based on Deep Reinforcement Learning (DRL) for the integrated planning of production orders and maintenance activities in semiconductor manufacturing as well as the transfer of the models into practice. Based on the objectives and challenges of the project partners working in semiconductor manufacturing, we specify suitable objective functions to train a DRL agent. This DRL agent will be trained in a reference simulation environment and its performance will be evaluated using various models as benchmark. In particular, the conditions under which satisfactory solutions are found and the relation between the quality of the solutions found and the computing power required will be investigated.